A phase interpolator is a commonly used block in communications as well as other types of circuits. For example, linear phase interpolators are often employed in phase-locked loop (PLL) and delay locked loop (DLL) circuits to allow the phase of sampling clocks to be adjusted in very fine increments. Various techniques have been developed in an effort to achieve linear phase interpolation. One type of interpolator employs a plurality of stages, each stage adjusting the phase of an output signal to a phase angle that is an average of two or more input signals.
Another type of phase interpolator can adjust a phase of its output to an incremental phase angle that is between two or more input signals. Various circuitry has been proposed to achieve the incremental adjustments for the output phase angle. In one example, the circuitry can be implemented using CMOS technology. Due to a square law relation that exists between current and the transconductance of MOS transistors, however, a linear variation in current may not translate to linear variation of gain in VGA stages designed using CMOS technologies. This non-uniform translation complicates implementing phase interpolators with linear interpolation steps, and therefore often requires the use of complex blocks, such as a current pre-distorter, to linearize the transconductance with current. Additional non-linearities can arise due to the effects of Miller capacitance in the transconductance stage, which can cause significant stray or phantom currents. The phantom currents in the stage thus are summed at the output and, thereby, result in increased non-linear behavior in the output signal.
As industry trends keep moving to higher density technology, nodes with smaller geometries and lower supply voltage it becomes increasingly difficult to implement conventional circuit techniques to provide for linear phase interpolation.